1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device, and is suitably applied to, for example, a non-volatile semiconductor memory device in which data can be written into a memory transistor by injecting electrons into a floating gate.
2. Description of the Related Art
In recent years, the study of non-volatile semiconductor memory devices, which can be easily manufactured by a standard CMOS (Complementary Metal Oxide Semiconductor) process, has been actively conducted. In such non-volatile semiconductor memory devices, an FN (Fowler Nordheim) tunnel injection method, a channel hot electron injection method, and a source side injection method are known as main methods for writing data in a memory transistor having an N-channel MOS (Metal Oxide Semiconductor) structure.
On the other hand, as methods for writing data into a memory transistor having a P-channel MOS structure, there is known a BTBT (band to band tunneling) method in which secondary electrons due to the band-to-band tunneling current are injected into a floating gate. Here, in the BTBT method, electrons can be injected into a floating gate at a relatively low voltage and low power consumption, and as an example of the BTBT method, a method described in U.S. Pat. No. 6,044,018 is known.
In practice, in the non-volatile semiconductor memory device described in U.S. Pat. No. 6,044,018, data can be written in such a manner that, in a memory transistor, band-to-band tunneling current is generated, for example, by applying a positive voltage of 4 to 5 [V] to a floating gate, and by applying a negative voltage of −VCC to a drain region, and that electrons of the drain region are injected into the floating gate by the band-to-band tunneling current.
However, in the non-volatile semiconductor memory device described in U.S. Pat. No. 6,044,018, band-to-band tunneling current is generated by respectively applying positive and negative voltages to the floating gate and the drain region at the time of data writing, and hence a potential difference is increased in correspondence with the difference between the applied positive and negative voltages. On the other hand, in this type of non-volatile semiconductor memory devices, if electrons can be injected into the floating gate at the time of data writing by applying various voltages, such as only positive voltage or only negative voltage, to the floating gate and the drain region, the degree of flexibility in designing a memory transistor, a peripheral circuit, and the like, can be correspondingly improved.
For this reason, as for this type of non-volatile semiconductor memory devices, it is desired to develop a non-volatile semiconductor memory device having an unprecedented novel structure in which electrons can be injected into a floating gate by applying various voltages.
Accordingly, the present invention has been made in view of the above described circumstances, and an object of the present invention is to propose a non-volatile semiconductor memory device having an unprecedented novel structure in which carriers can be injected into a floating gate by applying various voltages.